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MCP2515
REGISTER 4-1:
RXB0CTRL – RECEIVE BUFFER 0 CONTROL
(ADDRESS: 60h)
U-0
—
R/W-0
RXM1
R/W-0
RXM0
U-0
—
R-0
RXRTR
R/W-0
BUKT
R-0
BUKT1
R-0
FILHIT0
bit 7
Legend:
bit 0
R = Readable bit
W = Writable bit
U = Unimplemented bit, read as ‘0’
-n = Value at POR
‘1’ = Bit is set
‘0’ = Bit is cleared
x = Bit is unknown
bit 7
bit 6-5
bit 4
bit 3
bit 2
bit 1
bit 0
Unimplemented: Read as ‘ 0 ’
RXM<1:0>: Receive Buffer Operating mode bits
11 = Turn mask/filters off; receive any message
10 = Receive only valid messages with extended identifiers that meet filter criteria
01 = Receive only valid messages with standard identifiers that meet filter criteria. Extended ID filter
registers RXFnEID8:RXFnEID0 are ignored for the messages with standard IDs.
00 = Receive all valid messages using either standard or extended identifiers that meet filter criteria.
Extended ID filter registers RXFnEID8:RXFnEID0 are applied to first two bytes of data in the
messages with standard IDs.
Unimplemented: Read as ‘ 0 ’
RXRTR: Received Remote Transfer Request bit
1 = Remote Transfer Request Received
0 = No Remote Transfer Request Received
BUKT: Rollover Enable bit
1 = RXB0 message will rollover and be written to RXB1 if RXB0 is full
0 = Rollover disabled
BUKT1: Read-only Copy of BUKT bit (used internally by the MCP2515)
FILHIT0: Filter Hit bit – indicates which acceptance filter enabled reception of message
1 = Acceptance Filter 1 (RXF1)
0 = Acceptance Filter 0 (RXF0)
Note:
If a rollover from RXB0 to RXB1 occurs, the FILHIT bit will reflect the filter that accepted
the message that rolled over.
? 2003-2012 Microchip Technology Inc.
DS21801G-page 27
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